Tachyum has progressed to running applications in Linux interactive mode on Prodigy FPGA hardware with SMP (Symmetric Multi-Processing) Linux and the floating-point unit enabled on the field-programmable gate array (FPGA) prototype of its Prodigy Universal Processor.

According to the company, this latest key milestone is a critical turning point towards the final stage in the development of the Prodigy chip. It allows Tachyum to move from testing the design with billions of cycles in RTL simulation to the Quality Assurance (QA) stage to start running tests, regressions and conduct compatibility testing on the Prodigy FPGA prototype hardware, and start running quadrillions of cycles to test the chip before tape-out and sampling later this year, to ensure reliable operations.

Tachyum successfully replaced the DDR5, PCI Express 5.0, and 112G SERDES IPs. The transition to new IPs is now successfully complete and the new IPs are integrated. The next milestone will be demonstrating the now completed vectorizing compiler to show Prodigy running vectorized code on the FPGA.

Successfully running code interactively proves the stability of the system and allows the company to move forward with additional testing before advancing to tape out and sampling later this year. With the replacement IP successfully integrated, Tachyum is able to continue building towards full production and profitability prior to launching an IPO.

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